Arrangement and method for temperature compensation for resistance

ABSTRACT

An arrangement and a method for temperature compensation for a resistance ( 1 ). A resistance ( 1 ) with a controllable resistance value is compared with a reference resistance ( 2 ) which is in the form of a switched capacitor. A comparator ( 3 ) compares the two resistance values with one another. The comparator ( 3 ) takes an error signal as a basis for actuating the controllable resistance ( 1 ). This produces a thermally stable resistance. The principle can preferably be applied in transimpedance amplifiers.

The present invention relates to an arrangement for temperaturecompensation for a resistance and to a method for temperaturecompensation for a resistance.

Integrated resistances in semiconductor circuitry normally have arelatively high level of temperature dependency. However, it may bedesirable to provide an integrated resistance in temperature-independentor temperature-compensated fashion. Such resistances which areinsensitive to temperature are used, inter alia, in high-accuracytransconductance amplifiers, high-accuracy transimpedance amplifiers andin applications in medical engineering, for example in measuringequipment for blood sugar content.

Pages 248 to 250 in chapter 5.2 of the document by D. A. Johns, K.Martin: “Analog Integrated Circuit Design”, Toronto, Ontario, Canada,Wiley 1997 indicate how to provide on-chip resistances in thermallystable fashion. In this document, the transconductance of an operationalamplifier is stabilized by virtue of there being a high-accuracy,thermally stable external resistance in the form of a non-integrated,discrete component.

The document by A. McLaren and K. Martin: “Generation of AccurateOn-Chip Time Constants And Stable Transconductances”, IEEE Journal ofSolid-State Circuits, Vol. 36, No. 4, April 2001 proposes a developmentof this principle such that an on-chip resistance is used instead of theexternal reference resistance. For the purpose of calibrating thisresistance, complex analog circuitry is provided and also there is aneed for a variable bias resistance split into numerous,parallel-connected elemental resistances, graduated in binary andthermometer code, see FIG. 5 therein.

With a temperature variation of around 60° Celsius, the transconductancescatter for this principle is nevertheless around 2.2%. Added to this isthe fact that the convergence for such a circuit is relatively slow.

It is an object of the present invention to specify an arrangement and amethod for temperature compensation for a resistance which are able tobe implemented using integrated circuitry, have reduced circuitcomplexity and allow precise calibration.

The invention achieves the object for the arrangement by virtue of anarrangement for temperature compensation for a resistance

-   -   having a resistance with a controllable resistance value,    -   having a reference resistance which is in the form of a switched        capacitor,    -   having a comparator whose input side is coupled to the        controllable resistance and to the reference resistance and        which has an output for outputting an error signal, and    -   having a control input on the controllable resistance which is        coupled to the output of the comparator for the purpose of        controlling the resistance value.

For the method, the object is achieved by a method for temperaturecompensation for a resistance having the following method steps:

-   -   provision of a controllable resistance,    -   provision and actuation of a reference resistance as a switched        capacitor,    -   comparison of the resistance value of the controllable        resistance with the resistance value of the reference        resistance,    -   control of the resistance value of the controllable resistance        on the basis of a comparison result from the comparison.

Advantageous developments and refinements of the proposed principle arethe subject matter of the respective subclaims.

In accordance with the proposed principle, the reference resistance isprovided by virtue of a switched capacitor in the form of the resistancebeing provided. The temperature compensation for a resistance isachieved by virtue of the resistance being controlled on the basis of acomparison result between the resistance value of the controllableresistance and the reference resistance, which the switched capacitorhas as equivalent resistance value.

The switched-capacitor reference resistance is preferably of integrateddesign and has a temperature independency in practice. The temperaturedependency of a switched capacitor is less than 100 ppm per Kelvin.

In line with one development of the proposed principle, the controllableresistance comprises a series circuit. The series circuit preferably hasa fixed-value resistance and the controllable resistance.

The fixed-value resistance is preferably in the form of an integratedpolyresistance. The controllable resistance is preferably in the form ofa metal oxide semiconductor, MOS, transistor, with the resistance usedbeing the controlled path and the control input used being the gateconnection of the transistor.

In this case, the total resistance of the series circuit is keptconstant in temperature-independent fashion by virtue of the totalresistance of the series circuit being compared with the referenceresistance, and the controllable resistance being controlled on thebasis of any discrepancy, on the basis of the comparison result.

In accordance with the proposed principle, the controllable resistanceis controlled in a control loop such that the total resistance of theseries circuit remains constant.

The reference resistance in the form of a switched capacitor preferablycomprises a capacitance and at least one switch for periodic changeover.Such switched capacitors are also called switched capacitances.

In the case of a switched capacitance, the reference resistance issimulated by the switched capacitor. If a changeover switch connects theswitched capacitance C_(S) to an input voltage U then the capacitorreceives a charge quantity Q which corresponds to the product of thecapacitance value and the input voltage. In the other switch position,the capacitor outputs the same charge again. It therefore transfers thischarge from the input to the output of the circuit in each switchingperiod T_(S). This produces a flow of current I which, on average, setsitself to

$I = {{C_{s} \cdot \frac{U}{T_{s}}} = {C_{s} \cdot U \cdot {f_{s}.}}}$

The basic equivalence between the switched capacitance and a nonreactiveresistance can therefore be indicated as

${R = \frac{1}{C_{s} \cdot f_{s}}},$

where R is the equivalent resistance. Notable is the linear relationshipbetween the switching frequency fs and the equivalent admittance.

The capacitor in the switched-capacitor reference resistance may be inthe form of what is known as a poly-poly or metal-metal structure, forexample.

Consequently, the value of the reference resistance of a switchedcapacitor is dependent only on the switching frequency and thecapacitance value. The temperature coefficient of the capacitance valueis relatively low and is approximately 30 ppm per Kelvin, for example.

The practical implementation of such a circuit is relatively simple. Theprinciple converges very quickly and requires only a few components toimplement it. In addition, it affords a high level of flexibility in thechoice of calibration parameters, which can be valuable forcost-efficient implementation.

The reference clock for actuating the reference resistance in the formof a switched capacitor is preferably provided by a reference clockgenerator. The reference clock generator preferably actuates the switchfor periodic changeover.

In one development of the proposed principle, the controllableresistance is arranged in the return path of an amplifier. This meansthat it is possible to provide not only a resistance having hightemperature constancy but also an amplifier havingtemperature-independent transconductance or transimpedance.

When the controllable resistance is in the form of a series circuit, thefixed-value resistance is preferably in the form of a polysiliconresistance in integrated form. The controllable resistance in thisseries circuit is a tunable metal oxide semiconductor, MOS, transistorwhich is preferably operated in the linear range.

In line with one preferred development of the proposed principle, acommon current source is provided which can be switchably connectedeither to a first or to a second current path. The first current pathcomprises the controllable resistance. The second current path comprisesthe reference resistance, which is in the form of a switched capacitor.The comparator has a respective input coupled to the first and to thesecond current path. Hence, both current paths carry a current of thesame magnitude, which results in even higher precision for thetemperature compensation for the controllable resistance.

As a further preference, the temperature compensation is produced byusing a calibration current signal on the basis of the choppingprinciple. This chopping calibration signal can be produced using asmall current source and a switch, for example. In this case, the clockrate is chosen such that the calibration signal's frequency is at asufficient distance from the useful frequency range of a useful signalfor processing. In this case, the controllable resistance is preferablyarranged in a useful signal path. The useful signal path is set up forsignal processing for a useful signal in a useful frequency range. Theuseful frequency range is different than the frequency of the referenceclock. The chopped calibration signal is accordingly superimposed on theuseful signal.

If, as envisaged as a preference, a current source is provided jointlyfor both current paths then process and temperature fluctuations cannotinfluence the performance of the temperature compensation, since thesame current flows both through the controllable resistance and throughthe reference resistance.

The level of the calibration current on the basis of the reference clockis preferably low in order to avoid limiting the dynamic range of theuseful signal path.

Preferably, the output signals from both current paths are demodulatedwith respect to the chopping signal and, after suitable filtering, arecompared with one another. The filtering is preferably suitable forremoving the useful signal, which has now been converted to the choppingfrequency. In this case, the comparator is preferably a single-stageamplifier the output of which can be used to control the controllableresistance. This ensures that the resistance value of the controllableresistance follows the reference resistance accurately.

A calibration signal, which the useful signal contains on account of thechopping, outside of the useful frequency range with low amplitude caneasily be removed. This can be done using analog filters or digitalfilters, for example. Digital filters can be used advantageouslyparticularly when the useful signal is being digitized anyway forsubsequent further processing.

In another, preferred development of the proposed principle, in additionto the controllable resistance a further controllable resistance havinga controllable resistance value is provided and is arranged in a usefulsignal path. Accordingly the further controllable resistance with acontrollable resistance value is used for the actual useful signalprocessing, while the controllable resistance to be compared with thereference resistance is formed in an auxiliary path. This controllableresistance can also be understood to be a dummy component. Thisdispenses with the useful signal being superimposed with a choppingsignal. This dummy resistance is used to produce an output current whichis compared with an equivalent reference current. The equivalentreference current is produced in a switched-capacitor resistance. Thetwo currents are compared using an error amplifier. The error amplifierproduces a control signal which is used to control the controllableresistance and the further controllable resistance. This control signalis used to alter the controllable resistance value until the twocurrents being compared by the comparator are the same. Preferably, thecontrol signal is carried by a loop filter which guarantees thestability of the control loop. A temperature drift which neverthelessremains is dependent on the accuracy of a reference voltage, on thetemperature drift in the capacitive reference element in theswitched-capacitor reference resistance, on a temperature drift in aclock source and on a temperature drift in a preferably provided currentmirror. To produce a stable reference voltage, a bandgap generatorarrangement may be provided, for example. Such bandgaps have atemperature coefficient of less than 15 ppm per Kelvin, for example.Crystal clock generators have excellent, low temperature coefficients ofvery much lower than 1 ppm per Kelvin, for example. Accordingly, thereference capacitor in the switched-capacitor reference resistance makesthe primary contribution to the temperature drift which still remains,for example at 43 ppm per Kelvin. Even with worst-case appraisal of allof these causes of a temperature drift, the latter remains significantlybelow 100 ppm per Kelvin overall, which is a significant improvement,with particularly simple circuit implementation in addition. The use ofa copy of the controllable resistance as proposed in this developmentmeans that any errors which might arise as a result of charge injectionsfrom the switched-capacitor circuit into the useful signal path areavoided.

In this development too, the controllable resistance is preferablyformed in a series circuit comprising a fixed-value resistance and thecontrollable resistance.

As a further preference, the error amplifier, namely the comparator, isdesigned using switched-capacitor technology.

A loop filter for filtering the control signal which is output by thecomparator is also preferably designed using switched-capacitortechnology.

The invention is explained in more detail below using a plurality ofexemplary embodiments with reference to drawings, in which:

FIG. 1 shows a first exemplary embodiment of an arrangement based on theproposed principle,

FIG. 2 shows a second exemplary embodiment of an arrangement based onthe proposed principle,

FIG. 3 shows an exemplary development of the circuit from FIG. 2 with achopping principle,

FIGS. 4 a and 4 b show the relationship between clock frequency anduseful frequency range for the circuit from FIG. 3,

FIG. 5 shows another, exemplary development of the circuit from FIG. 2with a chopping principle,

FIG. 6 shows an exemplary clock signal for actuating the switches fromFIGS. 3 and 5,

FIG. 7 shows an exemplary development of the circuit from FIG. 5 for aplurality of channels,

FIG. 8 shows exemplary clock signals for actuating the switches fromFIG. 7,

FIG. 9 shows an exemplary embodiment of the useful signal amplifier witha controllable feedback resistance,

FIG. 10 shows an exemplary embodiment of a circuit based on the proposedprinciple for actuating the resistance from FIG. 9,

FIG. 11 shows exemplary signals for actuating the switches from FIG. 10in four clock phases, and

FIG. 12 shows the exemplary signal profile for a comparison signal asshown in FIG. 10.

FIG. 1 shows an exemplary arrangement for temperature compensation for aresistance on the basis of the proposed principle. A resistance 1 with acontrollable resistance value is provided. In addition, the arrangementcomprises a reference resistance 2 which is in the form of a switchedcapacitor. A comparator 3 has two inputs. A first input is coupled tothe controllable resistance 1 for the purpose of transmitting theresistance value of the controllable resistance 1 or a signal derivedtherefrom. The second input of the comparator 3 is coupled to thereference resistance 2 for the purpose of transmitting the referenceresistance value or a value derived therefrom. An output of thecomparator is designed to output an error signal. The error signal isdependent on a discrepancy between the resistance value of thecontrollable resistance and the resistance value of the referenceresistance. The output of the comparator 3 is connected to a controlinput of the controllable resistance 1.

The reference resistance 2 in the form of a switched capacitor comprisesa reference capacitor 5 and a switch 6. The switch 6 is actuated at aclock frequency f_(S) of a reference clock. The equivalent resistance ofthis switched-capacitor reference resistance is calculated, on the basisof the specification, from the reciprocal product of the capacitancevalue C_(S) of the capacitor 5 and the clock frequency f_(S) of thereference clock actuating the switch 6.

The comparator compares the resistance value of the controllableresistance with the resistance value of the reference resistance. Assoon as a temperature-related discrepancy in the resistance value of thecontrollable resistance 1 is found, the comparator outputs an errorsignal such that the resistance value of the controllable resistance 1is tracked to the resistance value of the thermally stable referenceresistance.

This achieves highly precise temperature compensation for thecontrollable resistance 1. Temperature dependencies in the resistancevalue of the controllable resistance 1 are corrected practicallycompletely.

FIG. 2 shows a development of the circuit from FIG. 1, these figureslargely matching in terms of the components used, the way in which theywork and the advantages achieved thereby. Instead of the controllableresistance 1 from FIG. 1, FIG. 2 has a series circuit which comprises afixed-value resistance 4 and a controllable resistance 1′. In the caseof the circuit in FIG. 2, the resistance value of the series circuitcomprising the fixed-value resistance 4 and the controllable resistance1′ is compared with the reference resistance 2. The fixed-valueresistance 4 may be in the form of a polysilicon resistance, forexample, and may therefore have a relatively high level of temperaturedependency, which is compensated for using the controllable resistance1′ and the described control loop. Hence, the sum of the resistancevalue of the fixed-value resistance 4 and the controllable resistance 1′is always kept constant, even in the event of severe changes in theambient temperature.

FIG. 3 shows a development of the circuit from FIG. 2 on the basis of achopping principle. In this case, a calibration signal is superimposedon a useful signal for processing. Specifically, in the presentexemplary embodiment the series circuit comprising the fixed-valueresistance 4 and the controllable resistance 1′ is connected between anoutput of an operational amplifier 7 and an inverting input of theoperational amplifier 7. The operational amplifier 7 is in the form of atransimpedance amplifier. The controllable resistance 1′ is in the formof a metal oxide semiconductor, MOS, transistor. The operationalamplifier 7 is arranged in a useful signal path, with its invertinginput additionally having a useful signal source 8 connected to it. Theuseful signal source outputs an input current I_(IN). The output of theoperational amplifier 7 is connected to an output 10 of the usefulsignal path via a low pass filter 9.

A common current source 11 is switchably connected either to theinverting input of the operational amplifier 7 or to a second currentpath 13 by means of a changeover switch 12. In this case, the commoncurrent source 11 outputs a calibration current I_(CAL). Thenon-inverting input of the operational amplifier 7 is connected to areference potential connection. The second current path 13 comprises areference resistance in the form of a switched capacitor 2, which inturn comprises a capacitance 5 and a changeover switch 6. The freeconnection of the capacitance is connected to a reference potentialconnection 14. Both the changeover switch 12 for the common currentsource 11 and the changeover switch 6 for the switched-capacitorreference resistance 2 are controlled by a reference clock at thereference frequency f_(S). The output of the operational amplifier 7 isconnected to an input of a comparator 16 via a bandpass filter 15 toform a first current path. Similarly, the second current path 13, whichcomprises the reference resistance 2, is connected to a second input ofthe comparator 16 via the bandpass filter 15. The output of thecomparator 16 is connected to the gate connection of the controllableresistance 1′ in the form of a transistor, to form a control loop.

Temperature fluctuations in the fixed-value resistance 4 in the form ofan integrated polyresistance are automatically compensated for by usinga calibration. The MOS transistor 1′ is operated in its linear range.The total resistance of this series circuit 4, 1′ is compared with thereference resistance 2, the equivalent resistance of the switchedcapacitor 5.

The reference capacitor 5 is in the form of a poly-poly or metal-metalstructure. The equivalent reference resistance of the referenceresistance 2 is dependent only on the switching frequency f_(S) and thecapacitance value of the capacitor 5, whose temperature coefficient isrelatively low, for example approximately 30 ppm per Kelvin.

A small calibration current is produced by means of the calibrationcurrent source 11 using commutation. This calibration current is used tomeasure the resistance 4, 1′ and also the reference resistance 2 and tocompare them. To this end, periodic changeover at the switchingfrequency f_(S) is provided. A filtering unit 15 and a comparison unit16 are used to produce a control signal which controls the gate-sourcevoltage of the MOS transistor 1′ and hence changes the resistance of thelatter's controlled path.

The practical implementation of the principal is very simple and thecalibration can take place continuously in the background withoutinterrupting the useful signal processing between the generator 8 andthe output 10 of the useful signal path. This principle works veryquickly and requires only a few components. Furthermore, a high level offlexibility is provided.

In the present case, the calibration is accordingly performed using achopped calibration current signal. This chopping signal is easilyproduced with the calibration current source 11 and the switch 12. Theclock rate f_(S) for the switch 12 is chosen such that the calibrationsignal is at a sufficient distance from the useful frequency range,supplied by the useful signal source 8, the transimpedance amplifier 7operating in this useful frequency range. Process and temperaturefluctuations in the calibration current from the source 11 have noinfluence on the properties and quality of the calibration operation,since the same calibration current I_(CAL) flows both through thereference resistance in the second current path 13 and through the firstcurrent path, which comprises the fixed-value resistance 4 and thecontrolled resistance 1′. The magnitude of the calibration current maybe small in order to avoid limiting the dynamic range of the usefulsignal processing.

The bandpass filter 15 comprises means for demodulating the choppingsignal using a simple chopper and downstream filtering. The filtering isused to eliminate the useful signal, which has now been converted to thechopping frequency. The comparison in the comparator 16 can be performedusing a simple single-stage amplifier whose output is used to tune theresistance 1′. This ensures that the target resistance 1′, 4 follows thereference resistance 2 as a series circuit.

In relation to the useful signal at the output of the amplifier 7, thecalibration signal is small and is outside of the useful frequencyrange, it can easily be removed using the low pass filter 9. Even moresimple is the removal of the calibration components in the useful signalin the digital domain after analog/digital conversion.

In the present case, the calibrating principle is shown by means of atransimpedance amplifier 7. It goes without saying that the principlecan also be applied, within the context of the invention, to othercircuit configurations with modifications which are within the scope oftechnical action. By way of example, the calibration signal may be avoltage or a current, and the type of comparison and of calibration maybe current comparison, voltage comparison or similar. The level andfrequency of the calibration signal may accordingly match theapplication. In this case, it is desirable to keep the frequency of thecalibration signal at a sufficient distance from the useful signalfrequency band, be it at a higher or at a lower frequency. In this wayit is possible to use a very small calibration signal in terms of itsamplitude. A simplified filter design is possible. The filters may beRC, G_(m)C or SC filters.

FIG. 4 a shows the frequency band for the useful signal between thelower and upper frequencies f_(L), f_(H) by way of example. It can beseen that the clock frequency f_(S) of the calibration signal is at asufficient distance from the useful signal band for the filteroperations described.

FIG. 4 b shows the same signal spectrum as FIG. 4 a, but after chopping.In this case, the chopping frequency is precisely the clock frequencyf_(S). The dashed line corresponds to the filter characteristic. Theuseful signal band has been modulated onto the chopping frequency.

FIG. 5 shows a development of the circuit from FIG. 3, the circuitslargely corresponding in terms of the components used and theadvantageous interconnection thereof. Instead of the changeover switches12, 6 in FIG. 3, single switches are provided in this case. Thecapacitance 5 has been replaced by a series path capacitance 17. This isproduced with four switches, but as before a switched-capacitorreference resistance. Between the input IN and the output OUT, a usefulsignal path is connected as a first current path comprising theoperational amplifier 7 with a return path 1′, 4.

FIG. 6 shows exemplary signals for actuating the switches φ1, φ2, asdenoted therein. It can be seen that both control signals operate at thesame chopping frequency f_(S) and observe requisite non-overlap times.

FIG. 7 shows an exemplary development of the circuit from FIG. 5 for aplurality of channels for processing a plurality of useful signals.These are calibrated on the basis of the proposed principle as explainedby way of example with reference to FIG. 5. In this case, thecalibration path is present only once. The individual channels arecalibrated in succession in a time-division multiplex mode. In thiscase, a respective channel is calibrated while the other channels arerespectively used only for useful signal processing. Specifically, threechannels 46, 47, 48 are provided by way of example which are set up toprocess a respective useful signal and which are formed between an inputIN and an output OUT. The input and output IN, OUT have respectiveswitches 52 to 57 connected to them. The input-side switches 52, 54, 56are each used to supply a calibration signal CALSIG in a calibrationmode for the respective useful signal path. The calibration signalCALSIG is provided by the current source 11. In the calibration mode forthe respective useful signal path, the output-side switch 53, 55, 57 isused to output a sampling signal CALSENSE and to supply it to acalibration device 58, which may have the design shown in FIG. 5, forexample. The calibration device 58 is used to provide a control signalCNTR for the respectively calibrated useful signal path 46, 47, 48 whichis in turn taken as a basis for setting the controllable resistance 1′.For the purpose of storing the respective control signal CNTR, eachcontrol connection of the useful signal paths has a capacitor 49, 50, 51connected to it which is grounded. It is thus possible for each channel46, 47, 48 to be calibrated for a few clock periods. The resultantcontrol signal CNTR is stored on the capacitor 49, 50, 51 and is used toset the resistance value of the controllable resistance 1′.Subsequently, the next channel 47, 48, 46 is calibrated. The relativelysmall leakage currents in integrated capacitors and the relatively longtime constants for temperature changes allow a channel 46, 47, 48 to beoperated for a relatively long period without simultaneous calibration.Accordingly, it is possible to attain a significant saving in terms ofchip area and electrical power virtually without any drawbacks regardingaccuracy, since only one calibration path is required for a plurality ofuseful signal paths. In addition, a single, high-precision calibrationsignal CALSIG suffices, which could not be provided at such precision ifa separate calibration signal were required for each channel. Since, asalready explained in detail above, the calibration signal and the usefulsignal use different frequency bands it is also possible to use thechannel which is currently being calibrated for processing the usefulsignal without interruption.

FIG. 8 shows exemplary clock signals for actuating the switches in FIG.7. These control signals CAL1, CAL2, . . . , CalN activate therespectively associated switches in FIG. 7 periodically in succession inorder to attain the time-division multiplex mode. Hence, calibrationbased on the proposed principle is performed in a respective one of theuseful signal paths 46, 47, 48 while there is no provision for theuseful signal to be superimposed by a calibration signal in therespective remaining channels.

FIG. 9 shows an exemplary embodiment of the proposed principle with atransimpedance amplifier 18 whose output is connected to an invertinginput of the transimpedance amplifier 18 via a series circuit 19. Theinverting input simultaneously forms the input of the transimpedanceamplifier, to which a reverse biased photodiode 20 is connected. Thereturn path comprises the series circuit 19 containing a furtherfixed-value resistance 20 and a further controllable resistance 21. Thefurther controllable resistance 21 comprises a metal oxidesemiconductor, MOS, transistor with a control input and a controlledpath. The control voltage for the controllable resistance 21 is providedby a circuit as shown in FIG. 10, as explained below. The opticalreceiver shown in FIG. 9 requires a very precise transimpedance which isindependent of temperature, in particular. If the resistance 20 isdesigned as a semiconductor resistance made of doped polycrystallinesemiconductor material, such as polycrystalline silicon, as preferred,then it has a temperature drift of typically 600 ppm per Kelvin. Thetransimpedance amplifier shown in FIG. 9 converts the photodiode currentinto an output voltage which can be processed further. The gain of sucha circuit is defined by the feedback resistance 19. A high-precisiongain is required for high-accuracy sensor applications, for exampleglucose measuring equipment for blood sugar content. Temperaturecompensation is therefore required in order to produce a resistancewhich is free of temperature drift. In particular, the temperature driftmust be less than approximately 200 ppm per Kelvin.

The circuit explained below which is shown in FIG. 10 and is based onthe proposed principle can be used to keep the resistance of the seriescircuit largely free of temperature drifts, and to do the same for thetransimpedance of the amplifier.

FIG. 10 shows a circuit for producing a tuning voltage V_(CTRL) at anoutput 22, said circuit being used to tune the transistor 21 in FIG. 9in temperature-compensating fashion. For this, the circuit in FIG. 10comprises a copy of the series circuit 19 in FIG. 9, which is referredto as series circuit 19′. This series circuit 19′ comprises afixed-value resistance 20′ and a controllable resistance 21′, in eachcase as a copy of the relevant components 20, 21 of the series circuit19 in FIG. 9. The control input of the controllable resistance 21′ islikewise connected to the output 22. An input of a current mirror 22 isconnected via the controlled path of a transistor 23 to a connection ofthe series circuit 19′, which is also connected to a reference potentialconnection. The transistor 23 has a gate connection which is connectedto the output of an amplifier 24. The non-inverting input of theamplifier 24 is connected to a reference voltage source 25, while theinverting input of the amplifier 24 is connected to the voltage nodewhich connects the transistor 23 to the series circuit 19′. An output ofthe current mirror 22, which has a transformation ratio of 1:N, isconnected to an inverting input of a comparator 27 via a switch 26 in asecond clock phase φ2. In addition, the output of the current mirror 22is coupled to a reference potential connection via a switch 28 in afirst, third and fourth clock phase φ1, φ3, φ4. A switched-capacitorreference resistance 29 is likewise connected to the inverting input ofthe comparator 27. A respective connection of the capacitor 30 which theswitched-capacitor reference resistance 29 comprises can be connected toreference potential by means of a respective switch 31, 32 in a firstclock phase φ1. In addition, switches 33, 34 are provided which connectthe capacitor 30 between the inverting input of the comparator 27 and areference potential connection in a second clock phase φ2.

The comparator 27 is itself in the form of a switched-capacitoramplifier. For this, a return path comprises three parallel-connectedpaths. A first path between the output of the comparator 27 and itsinverting input comprises a switch 35 which can be activated in a firstclock phase φ1. A second path comprises a capacitor 36 which isconnected in series with a switch 37 for operation in a clock phase φ2.A second capacitor 38 likewise forms a series circuit with a switch 39in a third return path. The switch 39 is closed in the second to fourthclock phases φ2, φ3, φ4. Further switches 40, 41 are used to connect anode between the first and second capacitors 36, 38 and the associatedswitch 37, 39 to a reference potential connection 42.

In this case, the further switch 40, which is associated with the firstcapacitor 36, is closed in the first and third clock phases φ1, φ3. Thefurther switch 41, which is associated with the second capacitor 38, isclosed in the first clock phase φ1. The output of the comparator 27,which implements an error amplifier, is connected to the output 22 via aloop filter. The loop filter comprises a switched capacitor 43 which isconnected as switched capacitor between the output of the amplifier 27and an inverting input of a further amplifier 44. Four switches on theswitched capacitor 43 are used to charge it in the third clock phase φ3with the output signal from the amplifier 27 and to discharge it in thefourth clock phase φ4 to the input of the further amplifier 44. Thefurther amplifier 44 has a capacitance 45 in the return path between itsoutput, which is connected to the output 22, and its inverting input.The non-inverting input of the amplifier 44 is connected to groundpotential. The capacitors 43, 45 are used to stabilize the control loop.The capacitors 36, 38 in the return path of the error amplifier definethe residual error.

In line with FIG. 10, a bandgap voltage source 25 and a referenceresistance 29 are used as reference components. With the circuitimplementation used, this serves to provide a resistance 19 having muchlower temperature dependency. The circuit shown in FIG. 10 produces atemperature-dependent control voltage using a control loop in the output22, said control voltage being produced using a reference generator. TheMOS transistor 21 or 21′ adds an additional resistance to the feedbackresistance 19, 19′, which compensates for a temperature drift. A modelof this series circuit 19′ in the control loop shown in FIG. 10 is usedto produce an output current I_(out). The output current is comparedwith an equivalent reference current which is produced by a switchedcapacitor 29. The two currents are compared using the error amplifier27, which produces the control voltage downstream of a filter 43, 44,45. This control voltage in turn varies the resistance value of theresistance 21′ until the output current I_(out) and the referencecurrent produced by the switched capacitor 29 are the same. The loopfilter 43 to 45 stabilizes the control loop and is itself designed usingswitched-capacitor technology. The remaining temperature drift isaccordingly stipulated by the accuracy of the reference source 25, thetemperature drift in the reference capacitor 30, the temperature driftin the reference clock source which actuates the switches in FIG. 10 anda temperature drift in the current mirror 22. The bandgap voltagegenerator 25 has a temperature coefficient of less than 15 ppm perKelvin. To actuate the switches, a crystal reference is used which hasexcellent temperature drifts of significantly less than 1 ppm perKelvin. The main contribution is thus made by the reference capacitor30, which has a typical temperature drift in the example of 43 ppm perKelvin. Overall, however, even with a worst-case appraisal, the totaltemperature drift for the arrangement remains significantly below 100ppm per Kelvin, which is a significant improvement. The use of the copyof the series resistance circuit 19′ in the series circuit 19 in FIG. 9avoids any errors which might arise as a result of charge injection bythe switched-capacitor circuits into the useful signal path.

FIG. 11 shows the time profile for the control signals for the switchesin FIG. 10 in the four provided clock phases φ1 to φ4 by way of example.In this case, the label for the respective switches in FIG. 10 meansthat this switch is operated, that is to say closed, in the respectiveclock phase. In this context, the first clock phase φ1 corresponds toresetting, the second to integration, the third to amplification and thefourth to charging.

In detail, the circuit's capacitors 30, 36, 38 in the referenceresistance and in the return path of the error amplifier are reset inthe first clock phase φ1. The output of the operational amplifier 27 isset to the analog ground voltage VAGND. At the output of the amplifier44, the control voltage remains unchanged.

In the second clock phase φ2, the capacitors 36, 38 in the return pathof the error amplifier are connected in parallel. At the start of thisclock phase, the reference resistance with the capacitor 30 is chargedto the analog reference voltage VAGND, and this charge is transferred tothe two capacitors 36, 38. During the second clock phase, the capacitors36, 38 are discharged by the output current I_(OUT) in an integrationcycle. At the end of the second clock phase, the charge differencebetween the reference voltage VAGND multiplied by the referencecapacitor 30 and the output current I_(out) multiplied by the clockperiod of the second phase φ2 is stored on the capacitors 36, 38.

In the third clock phase φ3, the charge difference described isamplified by transferring the charge from the capacitor 36 to thecapacitor 38. For this, capacitor 36 is shorted to the analog referencevoltage VAGND. The output of the error amplifier 27 is sampled to theswitched capacitor 43.

In the fourth and final clock phase φ4, the charge is transferred fromthe capacitor 43 to the capacitor 45 of the loop filter and tunes thegate of the transistor 21′ and of the transistor 21 in FIGS. 9 and 10 toa value. This value simultaneously stipulates the new resistance valuewhich the resistance 21′ and hence the series circuit 19′ have for thesubsequent cycle.

FIG. 12 shows the exemplary profile of the reference signal as errorsignal VAGND, namely the charge difference. As can be seen from FIG. 12,the charge difference in the subsequent clock cycle T_(n+1) is smalleron account of the matching of the gate voltage Vctrl in the precedingcycle T_(n).

LIST OF REFERENCE SYMBOLS

-   1 Controllable resistance-   1′ Controllable resistance-   2 Reference resistance-   3 Comparator-   4 Fixed-value resistance-   5 Capacitor-   6 Switch-   7 Amplifier-   8 Useful signal source-   9 Low pass filter-   10 Output-   11 Common current source-   12 Changeover switch-   13 Signal path-   14 Reference potential connection-   15 Bandpass filter-   16 Comparator-   17 Switched capacitor-   18 Transimpedance amplifier-   19 Series circuit-   20 Fixed-value resistance-   21 Controllable resistance-   20 Photodiode-   22 Current mirror-   23 Transistor-   24 Amplifier-   25 Bandgap-   26 Switch-   27 Error amplifier-   28 Switch-   29 Switched capacitor-   30 Capacitor-   31 Switch-   32 Switch-   33 Switch-   34 Switch-   35 Switch-   36 Capacitor-   37 Switch-   38 Capacitor-   39 Switch-   40 Switch-   41 Switch-   42 Switch-   43 Switched capacitor-   44 Amplifier-   45 Capacitor-   46 Channel-   47 Channel-   48 Channel-   49 Capacitor-   50 Capacitor-   51 Capacitor-   52 Switch-   53 Switch-   54 Switch-   55 Switch-   56 Switch-   57 Switch

1. A temperature compensation arrangement for a resistance comprising: aresistance with a controllable resistance value; a reference resistancewhich is in the form of a switched capacitor; a comparator the inputside of which is coupled to the controllable resistance and to thereference resistance and which has an output for outputting an errorsignal; and a control input on the controllable resistance which iscoupled to the output of the comparator for controlling the resistancevalue.
 2. The arrangement as claimed in claim 1, wherein, thecontrollable resistance is in the form of a series circuit whichcomprises a fixed-value resistance and the controllable resistance. 3.The arrangement as claimed in claim 1, wherein the reference resistancein the form of a switched capacitor comprises a capacitance and at leastone switch for periodic changeover at a reference clock frequency. 4.The arrangement as claimed in claim 1, wherein a reference clockgenerator is provided which is coupled to the reference resistance inthe form of a switched capacitor.
 5. The arrangement as claimed in claim1, wherein the controllable resistance is arranged in the return path ofan amplifier.
 6. The arrangement as claimed in claim 1, comprising acommon current source which is switchably connected to two currentpaths, wherein a first current path comprises the controllableresistance and a second current path comprises the reference resistancein the form of a switched capacitor.
 7. The arrangement as claimed inclaim 3, comprising a common current source which is switchablyconnected to two current paths, wherein a first current path comprisesthe controllable resistance and a second current path comprises thereference resistance in the form of a switched capacitor; wherein thecontrollable resistance is arranged in a useful signal path, set up forsignal processing for a useful signal in a useful frequency range, andthe useful frequency range is different than the frequency of thereference clock.
 8. The arrangement as claimed in claim 7, wherein theuseful signal path comprises a transimpedance amplifier, thecontrollable resistance is in a feedback path of the transimpedanceamplifier, and the comparator has a first input connected to an outputof the transimpedance amplifier and has a second input connected to thesecond current path.
 9. The arrangement as claimed in claim 7,comprising a plurality of useful signal paths which are coupled to acommon second current path via switches for calibration in atime-division multiplex mode.
 10. The arrangement as claimed in claim 1,comprising: a further controllable resistance having a controllableresistance value and arranged in a useful signal path; and wherein theoutput of the comparator is additionally coupled to the further,controllable resistance for controlling its resistance value.
 11. Thearrangement as claimed in claim 10, wherein the comparator comprises anamplifier connected up using switched capacitor technology as an erroramplifier.
 12. The arrangement as claimed in claim 11, comprised ofintegrated circuitry.
 13. A method for temperature compensation for aresistance, comprising the steps of: providing a controllableresistance; providing and actuating a reference resistance as a switchedcapacitor; comparing the resistance value of the controllable resistancewith the resistance value of the reference resistance; and controllingthe resistance value of the controllable resistance on the basis of acomparison result from the comparison.
 14. The method as claimed inclaim 13, comprising providing the resistance value of the controllableresistance as the sum of a fixed-value resistance value and acontrollable resistance value.
 15. The method as claimed in claim 13,comprising providing the reference resistance through periodicchangeover of a switchable capacitance under the control of a referenceclock.
 16. The method as claimed in claim 13, comprising providing thecontrollable resistance in the return path of an amplifier.
 17. Themethod as claimed in claim 13, comprising alternately supplying a firstcurrent path and a second current path with a common current, where thefirst current path comprises the controllable resistance and the secondcurrent path comprises the reference resistance.
 18. The method asclaimed in claim 15, comprising: alternately supplying a first currentpath and a second current path with a common current, where the firstcurrent path comprises the controllable resistance and the secondcurrent path comprises the reference resistance; processing a usefulsignal in a useful frequency range using the controllable resistance,and controlling the switchable capacitance using the reference clock,the frequency of which is different than the useful frequency range. 19.The method as claimed in claim 18, comprising amplifying the usefulsignal using a transimpedance amplifier on the basis of the resistancevalue of the controllable resistance, and comparing the amplified usefulsignal with a signal derived from the reference resistance.
 20. Themethod as claimed in claim 18, comprising alternately calibrating aplurality of useful signal paths in a time-division multiplex mode usinga common calibration signal on the basis of a common referenceresistance.
 21. The method as claimed in claim 13, comprising: providinga further, controllable resistance in a useful signal path, andcontrolling the resistance value of the further, controllable resistanceon the basis of a comparison result from the comparison.
 22. The methodas claimed in claim 21, comprising comparing the resistance value of thecontrollable resistance with the resistance value of the referenceresistance (29) using a switched-capacitor error amplifier.